Guided-wave photodetectors in germanium on optical chips in silicon-on-insulator

V. Sorianello vsorianello@uniroma3.it NooEL Nonlinear Optics and OptoElectronics Lab, Department of Electronic Engineering, University ’Roma Tre’, Via della Vasca Navale 84, 00146 Roma Italy M. Balbi NooEL Nonlinear Optics and OptoElectronics Lab, Department of Electronic Engineering, University ’Roma Tre’, Via della Vasca Navale 84, 00146 Roma Italy L. Colace NooEL Nonlinear Optics and OptoElectronics Lab, Department of Electronic Engineering, University ’Roma Tre’, Via della Vasca Navale 84, 00146 Roma Italy G. Assanto NooEL Nonlinear Optics and OptoElectronics Lab, Department of Electronic Engineering, University ’Roma Tre’, Via della Vasca Navale 84, 00146 Roma Italy L. Socci PGT Photonics, Viale Sarca, 222 Milano Italy


INTRODUCTION
The technology of Germanium on Silicon has been recognized in recent years as the best alternative to the wellestabilished III-V technology for the fabrication of high performance near-infrared (NIR) photodetectors [1].The large optical absorption of Germanium at communication wavelengths and the monolithic integrability with standard CMOS technology have given rise to an intense research in materials and optoelectronic engineering.A number of groups worldwide have demonstrated Ge on Si photodetectors with excellent performance in terms of both sensitivity and speed [2]- [4].The final goal of this activity is the monolithic integration of near infrared detectors with standard Silicon technology for signal acquisition, amplification and processing.So far, however, only two teams have demonstrated the full integration of Germanium NIR photodiodes with standard Silicon electronics.In 2002 we demonstrated monolithic integration of an array of 8 polycrystalline Ge pixels with CMOS readout electronics [5], followed later by the realization of a digital camera based with a two-dimensional array of 512 elements [6].More recently, Luxtera Inc. demonstrated a monolithic optical receiver at 1550 nm operating at 10 Gbit/s and based on single-crystal Germanium waveguide photodetectors in 130 nm CMOS technology [7].The latter aspect, namely the integration of Ge thin films in the standard CMOS process, is crucial in the realization of effective Si-Ge NIR optoelectronics.We propose and demonstrate hereby the postprocess deposition of polycrystalline Germanium (poly-Ge) on pre-existing Silicon optics and/or electronics by physical vapour deposition (PVD), a low temperature (around 300 • C) approach suitable for Ge on Si integration.The defected morphology of the evaporated films worsens to some extent the electrical properties of the poly-Ge as compared to crystalline Ge, but good performance can be retrieved by a careful design.In particular, it is possible to make use of distributed light absorption in waveguiding structures, as we recently demonstrated in devices on Silicon on Insulator (SOI) substrates with low dark currents and responsivities between 0.1 and 0.3 A/W [8].In this work we present the latest study on the integration of polycrystalline Germanium waveguide photodetectors (WPD) on Silicon optics in SOI chips in order to realize circuits with embedded signal power monitors.

GEOMETRY AND DESIGN CONSIDERATIONS
We integrated waveguide detectors on a SOI optical chip consisting of several 500 × 220 nm 2 Si waveguides provided with bends and tapers; a few of them ended in Si sites where we could fabricate the photodetectors.A TEOS cladding covered the entire chip with vias to the detector sites.We designed two types of p-n heterojunction photodiodes based on distributed absorption of the (guided-wave) light reaching the site: WPD1 (Figure 1) is based on a waveguide including a thin film of evaporated p-type Ge, a metal layer on Ge ending on a pad for the anode, a metal layer on the n-type Si for the cathode; in WPD2 (Figure 2) we removed the metal from the top of the Ge waveguide with the exception of the anode pad.The main design parameters being the cross-section and the length of the waveguide, by numerical simulations and accounting for technological limitations we determined the following: 100 µm waveguide length in order to achieve complete light absorption, 5 µm width for the best collection efficiency compatibly with technological limitations, 100 nm thickness to operate at the maximum absorption efficiency with WPD1.The simulations confirmed that the slight difference between WPD1 and WPD2 should play an important role in both electrical and optical performances: the large aspect ratio of the devices, in fact, requires an appropriate electric field to accelerate the photogenerated carriers from the waveguide core to the side contacts, as we achieved with the metal layer covering the Ge waveguide.At the same time, the waveguide layout would suggest to avoid the presence of metal in order to reduce optical losses.Figure 3 shows the calculated absorption efficiencies versus Ge thickness.In WPD1 the efficiency exhibits a maximum due to the two competing sources of losses: for small Ge thicknesses the metal losses increase, limiting light absorption in the active Ge layer close to the heterojunction, where the photo-carriers contribute to the photocurrent; for large Ge thicknesses the metal losses decrease, but more absorption takes place in the non-active Ge, where photo-charges rapidily recombine without contributing to the photocurrent.In WPD2 the lack of metal contact on the waveguide improves the efficiency at smaller thicknesses and, for a Ge thickness of 100 nm, the absorption efficiency is nearly doubled; on the other hand the absence of metal reduces the collection efficiency.Figure 4 displays the normalized collection efficiency of a WPD2 device, reverse biased at 1 V, versus the metal film extension from the pad to the input facet: the efficiency nearly halves as the length of the metal contact tends to zero (i.e. as the device evolves from WPD1 to WPD2).Nevertheless, the responsivity of WPD2 could be increased and restored to WPD1 values by acting on the bias.

FABRICATION
The fabrication process of the SOI chip was carried out in Pirelli Labs.The chip layout was defined by electron-beam lithography followed by wet chemical etching of Si and the deposition of the TEOS cladding with vias on Si sites.We undertook the detector deposition at the end of the chip fabrication by evaporating Ge thin films.Integration via deposition of poly-Ge at the end of a standard Si-chip fabrication with a simple, low cost and low temperature process is the main advantage of the proposed approach.The process flow starts with the passivation of the Si surface by a buffered HF solution, in order to ensure a good quality heterojunction.Then the sample is placed in a vacuum chamber at around 10 −7 Torr and its temperature is raised to 300 • C before PVD of Ge.The Ge layout is defined by standard optical lithography followed by wet chemical etching.Finally, we evaporate the metal, typically aluminium or gold, defining the contacts by optical lithography.To obtain a perfect alignment of the contact on the waveguide and optimize the performance of the devices we performed a single lithographic step when defining the channels, with a subsequent self-aligned etching of metal and Ge.The latter expedient could not be applied to WPD2, because the metal covers only the pad for the external contact.We used lift-off to preserve the surface of the Ge waveguide and improve its guiding properties.
Quite important for integrating the detector on the chip is the realization of a good heterojunction; in particular, the achievement of a good passivation of the Si sites is crucial, as the HF solution is also very aggressive towards the cladding, causing the simultaneous etching of TEOS and the production of contaminants which hinder the passivation.

CHARACTERIZATION
The characterization of the chips consisted in three main steps.First, we characterized the Si waveguides in terms of optical propagation and coupling losses to estimate the effective light power at the input of the detectors.The chip was equipped with waveguides of different lengths, provided with bends; hence, by measuring input and output power versus length it was possible to evaluate the losses.Further, we employed guided-wave tapers to efficiently couple light from the 500 nm-wide Si channels into the 5 µm-wide WPD.Such tapers were characterized by differential input-output measurements using channels with tapers and anti-tapers.
Second, we characterized the photodiodes by measuring their dark current and responsivity at 1.55 µm.From these data we evaluated the signal to noise ratio in the presence of a small optical signal.Typical dark currents at 1 V reverse bias were in the range 0.2-2 µA for WPD1 and in the range 0.4-1 µA for WPD2. Figure 5 campares typical dark currents in WPD1 and WPD2.
The NIR responsivity was measured by coupling an input beam from a semiconductor laser source at 1.55 µm into the guide, using tapered fibres and measuring the photocurrent with a current-voltage converter and a lock-in amplifier.
In WPD1 the maximum responsivity at 1.55 µm was above 36 mA/W at 3 V reverse bias, although the simulations gave maxima of about 280 mA/W.This discrepancy is attributed in part by extra losses of about 3 dB due to mode mismatch between the Si taper and the multilayer metal-Ge-Si-insulator waveguide, as visible from the top with the aid of a camera.However, even accounting for these extra losses, the responsivity was lower than expected, possibly due to an insufficient passivation of the Si surface with the creation of recombination centers in the heterojunction.We validated this hypothesis by butt-coupling the input beam and characterizing similar devices on SOI but without TEOS: the results were in line with those reported in [8].We obtained an improvement in WPD2, with a maximum responsivity of 0.11 A/W at the same wavelength and bias.Figure 6 shows the comparison between maximum responsivities; the better performance of WPD2 stems from the improved absorption efficiency, with almost doubled responsivities compared to Figure 3 for devices with 100 nm thick Ge.WPD2 exhibit a stronger dependence of responsivity on reverse bias, owing to a limited collection of photocharges at lower voltages.In particular, since maximum absorption occurs at the input facet where the distance between pad and junction is the largest, the consequent potential drop determines a poorer electric field distribution where more photocarriers are available.An increase in reverse bias can compensate this drop and better the responsivity.where P in is the input power, R the responsivity, I d the dark current, I ph the photocurrent and B the bandwidth.The obtained SNR of both WPD1 and WPD2 are more than appropriate for employing these photodetectors as power monitors in fully integrated optoelectronics chips.
FIG. 7 Best signal to noise ratio versus reverse bias.

CONCLUSION
In conclusion, we have designed, fabricated and tested polycrystalline Germanium photodetectors integrated on SOI optical chips provided with waveguides and tapers.The detec-tors exhibit a maximum responsivitiy of 0.11 A/W at 1.55 µm, with very low dark currents.The resulting SNR figures are encouraging towards the application of these photodetectors as power monitors in optical chips for signal processing.

Figure 7
Figure 7 graphs the evaluated signal-to-noise ratios (SNR) for the best WPD1 and WPD2 devices.The SNR was calculated for a 1 µW optical signal of bandwidth 1 kHz, taking into account only shot noise (which is the main limiting noise factor